VHDL code for synchronous counters: Up, down, up-down (Behavioral)
Assignment 8 solutions 1) Design and draw combinational logic to perform multiplication of two 2-bit numbers (i.e. each 0 to 3) producing a 4-bit result. - ppt download
How to design a 3-bit even/odd synchronous counter - Quora
Design counter for given sequence - GeeksforGeeks
How to implement a 3 bit asynchronous odd counter with JK flip flops - Quora